The present invention relates to a management system for the memory of a processor or microprocessor. It is applicable to the management of memories of processors or microprocessors of many different types, on the basis of the known segmentation and pagination concept.
It is known that processors and more particularly microprocessors at present reach very high processing performances. These performance levels mainly result from technological advances, but also from the development of systems making it possible to manage the memories and which reach very high capacities for reduced overall dimensions.
It is known that a management system for the memory of a processor or microprocessor is an interface located between the processor and the physical memory or memories associated therewith, said system managing the addressing of the memory. These memory management systems already exist in high power processors, but they require a large number of logic components.
In general, a memory management system is not used for a microprocessor or microcomputer, with which is associated a limited capacity memory (e.g. 64 K octets). Thus, in microprocessors or microcomputers, the addressable space is very small and the instruction code is not independent of the introduction or location of data in the memory.
However, memory address management is desirable in more modern microprocessors, which are associated with memories having a very large capacity (between 1 and 16 megaoctets). This management becomes indispensable when several processors or microprocessors are interconnected so as to form a multiprocessor system. In this case memory management systems make it possible to protect access to the respective memory zones of these processors.
Existing memory management systems essentially permit a dynamic allocation of the memories during the performance of programs, protection against certain access types (writing or reading), the detection of errors during addressing and the use of common memory zones by different users, without disturbing the operation of the processor. These systems use different management techniques, segmentation, pagination or a method combining both of these. Pagination uses memory spaces of the same size, called pages, whilst segmentation uses memory spaces of different sizes, called segments, whereby a segment can be contained within a page or can cover several pages.
In the pagination technique, the memory space seen by the user and the operation system is a linear space for which access to the memory takes place by a single logic number. In segmentation, access to the memory requires a pair of numbers (number of the segment and shifts or offset). The main advantage of pagination is due to the ease of allocating pages in the memories, because all these pages have the same size. However, it has a major disadvantage in that it requires a protection of the different spaces of the user memory, due to the linear character of the memory space. Segmentation does not lead to the same memory space protection problems, but it has the disadvantage of complicating the introduction and location of the segments in the memory space.
Methods combining pagination and segmentation have the advantages and disadvantages of each of the two methods. However, no matter what the management methods used, the known management systems are specific of the type of processor or microprocessor used. Thus, it is substantially impossible to use a memory management system supplied by one manufacturer with a processor or microprocessor supplied by another.